1. Field of the Invention
The present invention relates to a solid-state image pickup device, and a method of manufacturing the same.
2. Description of the Related Art
An example of a CMOS (Complementary Metal Oxide Semiconductor) type solid-state image pickup element to which a back surface radiation type structure to which a light is made incident from a side opposite to a side having wiring layers formed thereon to be received is applied will now be described with reference to a schematic structural cross sectional view shown in FIG. 24.
As shown in FIG. 24, photodiodes PDs composing light receiving sensor portions of respective pixels are formed in a single-crystalline silicon layer 361. Also, a color filter layer 364 and lenses 365 are provided on an upper side (on a light incidence side) relative to the single-crystalline silicon layer 361. It is noted that as will be described later, the single-crystalline silicon layer 361 is obtained by thinning a silicon substrate (not shown).
On the other hand, multiple wiring layers 363 are provided in an interlayer insulating layer 362 on a lower side (on a side opposite to the light incidence side) relative to the single-crystalline silicon layer 361. Also, the interlayer insulating layer 362 having the multiple wiring layers 363 formed therein is supported by a supporting substrate 366 provided under the interlayer insulating layer 362.
With a method of manufacturing the CMOS type solid-state image pickup element described above, the photodiodes PDs composing the light receiving sensor portions of the respective pixels are formed in the neighborhood of a surface of the silicon substrate (not shown) by carrying out ion implantation. Also, gate electrodes 372 of respective pixel transistors are formed on the silicon substrate through respective gate insulating films (not shown). In addition, the wiring layers 363 are formed in order in the interlayer insulating film 362.
Next, the surface of the uppermost interlayer insulating film 362 is planarized, the silicon substrate described above is reversed, and the supporting substrate 366 is then stuck onto the planarized surface of the uppermost interlayer insulating film 362.
Next, a back surface of the silicon substrate is polished to thin the silicon substrate, thereby forming the single-crystalline silicon layer 361 described above. As a result, the photodiodes PDs are formed inside the silicon substrate (that is, the single-crystalline silicon layer 361). Also, the color filter layer 364 and the lenses 365 are formed in order on the above single-crystalline silicon layer 361 having a predetermined thickness on a planarizing layer (not shown).
In the manner described above, it is possible to manufacture the CMOS type solid-state image pickup element 360 shown in FIG. 24. The CMOS type solid-state image pickup element, for example, is described in Japanese Patent Laid-Open No. 2005-150463 (hereinafter referred to as Patent Document 1) (refer to FIG. 35).
With the manufacturing processes described above, in forming the lenses 365 in the final process, the lenses 365 need to be aligned with the respective photodiodes PDs previously formed. For this reason, the presence of an alignment mark becomes essential for the formation of the lenses 365.
In addition, since the supporting substrate 366 is stuck onto the side of the interlayer insulating film 362, it may be impossible to form pad contacts (not shown) by utilizing a normal method.
For this reason, in forming the photodiodes PDs inside the silicon substrate (the single-crystalline silicon layer 361), a hole (not shown) for the alignment mark is formed so as to extend completely up to the back surface of the silicon substrate, and an insulating layer is filled in the hole, thereby forming the alignment mark (not shown). Thus, in forming the lenses 365, the lenses 365 can be aligned with the respective photodiodes PDs by using the alignment mark.
With the structure described above, however, for extraction of an electrode for formation of the pad, the single-crystalline silicon layer needs to be dug from the light incidence side, thereby forming an opening portion which is opened through an upper portion of the electrode because the electrode is formed on the wiring layer side. This process results in an increase of the number of processes, and an increase of a manufacture cost. In addition, there is the electrode for the pad in a bottom portion of the opening portion. Therefore, an element area increases all the more because the opening portion needs to be widely formed in order to prevent a wiring connected to that electrode from contacting the periphery of the opening portion.
In addition, a structure different from the structure described above is also disclosed. In this case, although not illustrated, for example, a silicon layer is formed on a wiring insulating layer having a wiring formed therein, and a photodiode is formed in the silicon layer. Also, a contact layer is formed so as to extend completely through the silicon layer to reach an upper portion of the wiring insulating layer. An insulating layer is formed in a side periphery of the contact layer so as to be insulated from the silicon layer. Also, a lower portion of the contact layer described above is connected to the wiring in a wiring layer formed in the wiring insulating layer, and an upper portion of the contact layer described above is connected to the pad electrode, thereby structuring a pad portion.
A metal such as tungsten (W) is used as a material for the contact layer described above. In addition to tungsten, aluminum (Al), copper (Cu), silver (Ag), gold (Au), or an alloy thereof can be used as the metal for the contact layer described above.
In addition, an insulating layer made of the same material as that for the insulating layer described above is formed in the silicon layer so as to extend completely through the silicon layer, thereby forming an alignment mark.
With this related art, the insulating layer forming the alignment mark, and the metal forming the contact layer are formed in the different processes, respectively. In addition thereto, after the insulating layer forming the alignment mark is filled in a connection hole forming the contact layer, the insulating layer filled in the connection hole is removed. After that, the metal is filled in the connection hole through a newly formed insulating layer, thereby forming the contact layer. This technique, for example, is described in Patent Document 1 (refer to FIG. 1). To this end, the manufacturing processes are complicated.